Bus Signals - Development

Introduction

The glue logic in the various consoles generates a number of bus signals which are present in some cases at the cartridge slot, expansion slot, etc. Some are internal only.

These signals are of immediate relevance to anyone designing a cartridge, with or without mappers; to anyone attempting a diagnosis or a repair on a faulty unit and may also be of use to anyone interested in emulating different mappers or more "exotic" cartridge hardware.

Since the service manuals and official guides don't typically explain these bus signals, the following information has been ascertained or inferred from testing on real consoles. Where possible, original sources of information are supplied.

Also most signals have aliases, depending on where they are originally described.

There are a few areas of inconsistency / error in some sources, and where possible these are noted below.

Signal active state

There are numerous conventions for describing active-low logic, e.g.:

KBSEL, /KBSEL, #KBSEL, ~KBSEL, KBSEL_N, !KBSEL

All of these mean the same thing: that a logic value of 0 means the signal is to be considered "active".

This article has chosen to use the # notation, e.g. #KBSEL, to indicate active-low signals, since the # character is plain ASCII and is unlikely to be used for another typographical purpose.

The ! character in equations below means a logical NOT operator. The + character is a logical OR operator.

Memory related signals

Name(s)	SMS cart	SMS card	SMS ext	MKIII	Direction	Description
`#M0-7, #EXM2`	Pin 11	Pin 11	Pin 11	-	Output	Accessing memory in slots 0 or 1 (ROM - $0000:7fff)
`#M8-B, #EXM1`	Pin 5	Pin 5	Pin 5	Pin B4	Output	Accessing memory in slot 2 (ROM - $8000:$bfff)
`#MC-F, #CSRAM`	Pin 49	-	Pin 49	-	Output	Accessing memory in slot 3 (RAM - $c000:$ffff)
`#CE, #CE3`	Pin 13	-	-	-	Output	Accessing memory and the cartridge is enabled
`#CE, #CE2`	-	Pin 13	-	-	Output	Accessing memory and the Sega Card slot is enabled
`#CE, #CE4`	-	-	Pin 13	-	Output	Accessing memory and the expansion port is enabled
`- , #CE0`	-	-	-	-	-	SMS internal: chip enable signal to base system ROM (BIOS)
`- , #CE1`	-	-	-	-	-	SMS internal: chip enable signal to base system RAM

Equations & notes

// signals present externally (i.e. carts, carts, etc.)
#M0-7 = #MREQ  +  A15
#M8-B = #MREQ  + !A15  +  A14
#MC-F = #MREQ  + !A15  + !A14
#CE3  = #MREQ  +  PORT$3E[6]
#CE2  = #MREQ  +  PORT$3E[5]
#CE4  = #MREQ  +  PORT$3E[7]

// signals internal to console
#CE0  = #MREQ  +  PORT$3E[3]
#CE1  = #MREQ  +  PORT$3E[4]

IO related signals

Name(s)	SMS cart	Direction	Description
`JREAD, #KBSEL`	Pin 48	Output	Accessing I/O control pad ports ($dc or $dd)
`JYDS, KILLGA`	Pin 43	Input	Stops the gate array responding to I/O requests in range $c0:$ff
`#CONT, #CONT1`	Pin 34	Input	General purpose input readable on I/O port $dd

Equations & notes

// signals present externally (i.e. carts, carts, etc.)
#KBSEL = #IOREQ  + !A7  + !A6

/* 
 Note: JREAD is a bad alternative descriptor for #KBSEL, since it is not specific to 
 read operations and also it is active-low logic so should be written with a bar.
*/

// signals internal to console (note, all active low)
#(port $3e write)      = #IOREQ  + !A7  +  !A6  + !A0  +  #WR
#(port $3f write)      = #IOREQ  + !A7  +  !A6  +  A0  +  #WR
#(vcounter read)       = #IOREQ  + !A7  +   A6  + !A0  +  #RD
#(hcounter read)       = #IOREQ  + !A7  +   A6  +  A0  +  #RD
#(psg write)           = #IOREQ  + !A7  +   A6  +  A0  +  #WR
#(vdp data read/write) = #IOREQ  +  A7  +  !A6  + !A0
#(vdp cmd read/write)  = #IOREQ  +  A7  +  !A6  +  A0
#(joypad port A read)  = #IOREQ  +  A7  +   A6  + !A0  +  #RD  +  KILLGA
#(joypad port B read)  = #IOREQ  +  A7  +   A6  +  A0  +  #RD  +  KILLGA

// signals accessible in software
PORT$DD[5] = #CONT

KILLGA is pulled down internally, so a cartridge need not supply a connection to this.
#CONT is pulled up internally on the SMS, so a cartridge need not supply a connection to this.

Special note for SG-1000/SC-3000/Mark III/Japanese Master System

The cartridge slots in these consoles do not include all the pins from the rest-of-world Master Systems, and also include one extra pin - #CSRAM on pin B3 - not to be confused with #MC-F on the rest-of-world Master System. The purpose of #CSRAM on these consoles is to deactivate the onboard RAM (a little like bit 4 of port $3e does in software).

Selected sources

As noted, information regarding the above can be fragmented or contradictory, so here follows a few selected sources which support the information given:

Back to Memory System index

Back to Development index