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Zoop, do you think you could answer these questions for sure if you did some monitoring on the most popular titles with Meka?
1) Is the WR signal also used for writing to RAM?
2) Is page 0 ever mapped to frame 1 or 2?
3) Is page 1 ever mapped to frame 2, on 1 mega cartridges?
4) Is page 1 ever read without writing $01 into a FCR?
5) What page is mapped to frame 2, on 2 and 4 mega cartridges?
Those answers would help a lot....

Eric, I didn't understand if you could read page 0 from frame 1 or 2 by writing zero to its FCR if you wanted to, because you said you read all pages from frame 1 or 2 except for page 0... was it necessary to read page 0 from frame 0?
And do you think you could figure out what page frame 2 contains on 2 and 4 mega cartridges?

Based on this answers i would know for sure what changes to make to the schematics i posted on http://www.spaceports.com/~vinci/smscart-rw1.gif

Hope you guys can help....

Quote

> 2) Is page 0 ever mapped to frame 1 or 2?
> 3) Is page 1 ever mapped to frame 2, on 1 mega cartridges?
> 4) Is page 1 ever read without writing $01 into a FCR?
> 5) What page is mapped to frame 2, on 2 and 4 mega cartridges?
> Those answers would help a lot....

Again and again there is no static answer to these questions.
It depends only on the cartridge itself. Refer to NES mappers, they are hundred of then.
It's basically the same, so try to handle all cases.

*USUAL* and I'm saying USUAL answers would be:
2: no (it's technically faisable but rare are the games using it)
3: yes
4: no
5: anything

i know it depends on the cartridge, that's why i asked about the most popular and common ones, because i think SEGA probably have a standard programming logic for mapping pages into frames...

And what about the 1st question, is the WR signal also used for writing to RAM?

Quote

> And what about the 1st question, is the WR signal also used for writing to RAM?

I think so, but none of us having actually wrote to RAM i can't be sure.

Should be something like:

set address
set data
enable write
wait a few ns
disable write
..
etc

Quote

> And what about the 1st question, is the WR signal also used for writing to RAM?

I think so, but none of us having actually wrote to RAM i can't be sure.

Should be something like:

set address
set data
enable write
wait a few ns
disable write
..
etc

i really hope it's not like that, or i will have to use 2 more IC's and a whole lot more connections.... Is there a way to know that for sure?

Eric, SMSARCH doc says:
"WR: This is the write signal. This signal should be asserted (made high) whenever writing to the FCRs. The WR signal should be low at all other times."

Where did you find this information?

Changing subjects, what did you guys think of the schematics? did you find anything wrong? suggestions are welcome!

Quote

> i really hope it's not like that, or i will have to use 2 more IC's and a whole lot more connections.... Is there a way to know that for sure?

> Eric, SMSARCH doc says:
> "WR: This is the write signal. This signal should be asserted (made high) whenever writing to the FCRs. The WR signal should be low at all other times."

Again, that SMSARCH document is simply about how to interface with a cartridge for ROM reading. The document does not cover SMS system design (cpu, RAM, ROM, I/O), it simply covers what is necessary to read a cartridge. With that in mind, the information about the WR signal is correct. You need to assert it when writing to the FCR's, and since that's the only time writing occurs, to a cartridge, that's the only time WR is asserted.

The SMSARCH document does not cover, and makes no assumptions, about how to create a replacement cartridge.

Quote

> Where did you find this information?

In a certain sense, I made it up, as that is what worked when I built the SMSARCH. It does not apply to your project. You have gone far beyond the information available in the SMSARCH document.

In the case of the WR signal I believe that it is tied to the Z80 WR line, and is asserted whenever the Z80 places data on the data bus. Simply put, WR will be asserted when writing to both RAM, Battery RAM, and the FCR's. I believe you will need to fully decode the addresses 0xFFFC through 0xFFFF. However, the MC-F signal should help a little.

If possible try some experiments. You're breaking new ground here. Let us know what the results are.

Quote

> Changing subjects, what did you guys think of the schematics? did you find anything wrong? suggestions are welcome!

I've briefly looked at the schematics. I don't remember my 74xxx family logic well enough to know what all the components are, though. Maybe this weekend I'll have some time to really go through it.

Good luck.

Eric Quinn

I dont think MC-F' would help, since it is set low when writing to the FCRs AND when acessing RAM... But Ive been studying the SMS schematics ive found on this site, and i noticed that the signal that is used to write to RAM is ROM, and not WR. Since WR is connected to the system ROM (hang-on/safari hunt, i guess) and to the cartridge slot, i guess its really only used to write to the FCRs.

But the schematics indicate that WR is actually WR, an active low signal, what would be more likely i think. But SMSARCH says WR is asserted (made high) wheneve writing to the FCRs, so now i dont know what to think.... Eric, when writing to the FCRs you set this signal high or low?

Also, i believe there is a way to be sure if those simplified logical functions for enabling writing to the FCRs (below) would work... It would require a little patience and time of yours, but it could be done with the rom dumper you built.

The procedure for a 2 or 4 mega cartridge would be:
1 write a page number to $FFFE (eg $04)
2 read an arbitrary byte on frame 1 (eg. $4BD2)
1 write a different page number to $FFFE (eg $03)
3 write the first page number ($04) to $0002 or whatever address ended with %10
4 read the same byte ($4BD2)

The same procedure for a 1 mega cartridge would be:
1 write a page number to $FFFF (eg $04)
2 read an arbitrary byte on frame 2 (eg. $A74C)
1 write a different page number to $FFFF (eg $03)
3 write the first page number ($04) to $0003 or whatever address ended with %11
4 read the same byte ($A74C)

if those bytes match, its very probable that these simplified logical functions for enabling writing to the FCRs do work!

F1IE = A1.A0.WR
F2IE = A1.A0.WR
[Of course, if WR is a active low signal, then it should be (WR) instead of WR]

Do you think you could check this? Youve got to agree that implementing a 16-input AND on a printed card would be a lot of work... =)

The rest of the team is working on a EEPROM writer, so i have to wait until its done to begin my experimentations with the fake cartridge. I'll first build it on the protoboard to test it, and when it works, i'll build it on a printed card. I hope everything goes well... =)

the TTL IC's are:
74125 - 4 tri-state buffers
74244 - 8 tri-state buffers (linked in 2 groups of 4 buffers)
7496 - 5-bit shift register with paralel inputs

Quote

> I dont think MC-F' would help, since it is set low when writing to the FCRs AND when acessing RAM... But Ive been studying the SMS schematics ive found on this site, and i noticed that the signal that is used to write to RAM is ROM, and not WR. Since WR is connected to the system ROM (hang-on/safari hunt, i guess) and to the cartridge slot, i guess its really only used to write to the FCRs.

O.k.

Quote

> But the schematics indicate that WR is actually WR, an active low signal, what would be more likely i think. But SMSARCH says WR is asserted (made high) wheneve writing to the FCRs, so now i dont know what to think.... Eric, when writing to the FCRs you set this signal high or low?

I don't remember. I lost all the SMSARCH software in a hard drive crash, and the device has been disassembled and is no longer working. The only file that survived was the SMSARCH document you've been reading, because I had a copy available on the web. It seems likely that WR is really WR' and the "made high" comment is wrong.

Quote

> Also, i believe there is a way to be sure if those simplified logical functions for enabling writing to the FCRs (below) would work... It would require a little patience and time of yours, but it could be done with the rom dumper you built.

> The procedure for a 2 or 4 mega cartridge would be:
> 1 write a page number to $FFFE (eg $04)
> 2 read an arbitrary byte on frame 1 (eg. $4BD2)
> 1 write a different page number to $FFFE (eg $03)
> 3 write the first page number ($04) to $0002 or whatever address ended with %10
> 4 read the same byte ($4BD2)

> The same procedure for a 1 mega cartridge would be:
> 1 write a page number to $FFFF (eg $04)
> 2 read an arbitrary byte on frame 2 (eg. $A74C)
> 1 write a different page number to $FFFF (eg $03)
> 3 write the first page number ($04) to $0003 or whatever address ended with %11
> 4 read the same byte ($A74C)

> if those bytes match, its very probable that these simplified logical functions for enabling writing to the FCRs do work!

> F1IE = A1.A0.WR
> F2IE = A1.A0.WR
> [Of course, if WR is a active low signal, then it should be (WR) instead of WR]
>
> Do you think you could check this? Youve got to agree that implementing a 16-input AND on a printed card would be a lot of work... =)

I can't. As I mentioned above, the SMSARCH is long gone. I wish I still had it, we could have resolved these probelms long ago! :-) Maybe someone else with a ROM dumper could help you.

Quote

> The rest of the team is working on a EEPROM writer, so i have to wait until its done to begin my experimentations with the fake cartridge. I'll first build it on the protoboard to test it, and when it works, i'll build it on a printed card. I hope everything goes well... =)

Good luck.

Quote

> the TTL IC's are:
> 74125 - 4 tri-state buffers
> 74244 - 8 tri-state buffers (linked in 2 groups of 4 buffers)
> 7496 - 5-bit shift register with paralel inputs

Thanks.

Eric Quinn

Author	Message
Angus Guest	Zoop, Eric, I need a little research from you guys Posted: Wed May 24, 2000 12:13 pm
Angus Guest	Zoop, do you think you could answer these questions for sure if you did some monitoring on the most popular titles with Meka? 1) Is the WR signal also used for writing to RAM? 2) Is page 0 ever mapped to frame 1 or 2? 3) Is page 1 ever mapped to frame 2, on 1 mega cartridges? 4) Is page 1 ever read without writing $01 into a FCR? 5) What page is mapped to frame 2, on 2 and 4 mega cartridges? Those answers would help a lot.... Eric, I didn't understand if you could read page 0 from frame 1 or 2 by writing zero to its FCR if you wanted to, because you said you read all pages from frame 1 or 2 except for page 0... was it necessary to read page 0 from frame 0? And do you think you could figure out what page frame 2 contains on 2 and 4 mega cartridges? Based on this answers i would know for sure what changes to make to the schematics i posted on http://www.spaceports.com/~vinci/smscart-rw1.gif Hope you guys can help....

Zoop Joined: 24 Jun 1999 Posts: 1732 Location: Paris, France	Posted: Wed May 24, 2000 1:33 pm
	Quote > 2) Is page 0 ever mapped to frame 1 or 2? > 3) Is page 1 ever mapped to frame 2, on 1 mega cartridges? > 4) Is page 1 ever read without writing $01 into a FCR? > 5) What page is mapped to frame 2, on 2 and 4 mega cartridges? > Those answers would help a lot.... Again and again there is no static answer to these questions. It depends only on the cartridge itself. Refer to NES mappers, they are hundred of then. It's basically the same, so try to handle all cases. USUAL and I'm saying USUAL answers would be: 2: no (it's technically faisable but rare are the games using it) 3: yes 4: no 5: anything

Angus Guest	what about WR signal? Posted: Wed May 24, 2000 2:36 pm
Angus Guest	i know it depends on the cartridge, that's why i asked about the most popular and common ones, because i think SEGA probably have a standard programming logic for mapping pages into frames... And what about the 1st question, is the WR signal also used for writing to RAM?

Zoop Joined: 24 Jun 1999 Posts: 1732 Location: Paris, France	Re: what about WR signal? Posted: Wed May 24, 2000 4:15 pm
	Quote > And what about the 1st question, is the WR signal also used for writing to RAM? I think so, but none of us having actually wrote to RAM i can't be sure. Should be something like: set address set data enable write wait a few ns disable write .. etc

Zoop Joined: 24 Jun 1999 Posts: 1732 Location: Paris, France	Re: what about WR signal? Posted: Wed May 24, 2000 4:15 pm
	Quote > And what about the 1st question, is the WR signal also used for writing to RAM? I think so, but none of us having actually wrote to RAM i can't be sure. Should be something like: set address set data enable write wait a few ns disable write .. etc

Angus Guest	what about the schematics? Posted: Fri May 26, 2000 1:28 am
Angus Guest	i really hope it's not like that, or i will have to use 2 more IC's and a whole lot more connections.... Is there a way to know that for sure? Eric, SMSARCH doc says: "WR: This is the write signal. This signal should be asserted (made high) whenever writing to the FCRs. The WR signal should be low at all other times." Where did you find this information? Changing subjects, what did you guys think of the schematics? did you find anything wrong? suggestions are welcome!

Eric R. Quinn Joined: 18 Sep 1999 Posts: 498 Location: Portland, Oregon USA	Re: what about the schematics? Posted: Fri May 26, 2000 3:55 pm
	Quote > i really hope it's not like that, or i will have to use 2 more IC's and a whole lot more connections.... Is there a way to know that for sure? > Eric, SMSARCH doc says: > "WR: This is the write signal. This signal should be asserted (made high) whenever writing to the FCRs. The WR signal should be low at all other times." Again, that SMSARCH document is simply about how to interface with a cartridge for ROM reading. The document does not cover SMS system design (cpu, RAM, ROM, I/O), it simply covers what is necessary to read a cartridge. With that in mind, the information about the WR signal is correct. You need to assert it when writing to the FCR's, and since that's the only time writing occurs, to a cartridge, that's the only time WR is asserted. The SMSARCH document does not cover, and makes no assumptions, about how to create a replacement cartridge. Quote > Where did you find this information? In a certain sense, I made it up, as that is what worked when I built the SMSARCH. It does not apply to your project. You have gone far beyond the information available in the SMSARCH document. In the case of the WR signal I believe that it is tied to the Z80 WR line, and is asserted whenever the Z80 places data on the data bus. Simply put, WR will be asserted when writing to both RAM, Battery RAM, and the FCR's. I believe you will need to fully decode the addresses 0xFFFC through 0xFFFF. However, the MC-F signal should help a little. If possible try some experiments. You're breaking new ground here. Let us know what the results are. Quote > Changing subjects, what did you guys think of the schematics? did you find anything wrong? suggestions are welcome! I've briefly looked at the schematics. I don't remember my 74xxx family logic well enough to know what all the components are, though. Maybe this weekend I'll have some time to really go through it. Good luck. Eric Quinn

Angus Guest	more doubts about WR Posted: Fri May 26, 2000 5:40 pm
Angus Guest	I dont think MC-F' would help, since it is set low when writing to the FCRs AND when acessing RAM... But Ive been studying the SMS schematics ive found on this site, and i noticed that the signal that is used to write to RAM is ROM, and not WR. Since WR is connected to the system ROM (hang-on/safari hunt, i guess) and to the cartridge slot, i guess its really only used to write to the FCRs. But the schematics indicate that WR is actually WR, an active low signal, what would be more likely i think. But SMSARCH says WR is asserted (made high) wheneve writing to the FCRs, so now i dont know what to think.... Eric, when writing to the FCRs you set this signal high or low? Also, i believe there is a way to be sure if those simplified logical functions for enabling writing to the FCRs (below) would work... It would require a little patience and time of yours, but it could be done with the rom dumper you built. The procedure for a 2 or 4 mega cartridge would be: 1 write a page number to $FFFE (eg $04) 2 read an arbitrary byte on frame 1 (eg. $4BD2) 1 write a different page number to $FFFE (eg $03) 3 write the first page number ($04) to $0002 or whatever address ended with %10 4 read the same byte ($4BD2) The same procedure for a 1 mega cartridge would be: 1 write a page number to $FFFF (eg $04) 2 read an arbitrary byte on frame 2 (eg. $A74C) 1 write a different page number to $FFFF (eg $03) 3 write the first page number ($04) to $0003 or whatever address ended with %11 4 read the same byte ($A74C) if those bytes match, its very probable that these simplified logical functions for enabling writing to the FCRs do work! F1IE = A1.A0.WR F2IE = A1.A0.WR [Of course, if WR is a active low signal, then it should be (WR) instead of WR] Do you think you could check this? Youve got to agree that implementing a 16-input AND on a printed card would be a lot of work... =) The rest of the team is working on a EEPROM writer, so i have to wait until its done to begin my experimentations with the fake cartridge. I'll first build it on the protoboard to test it, and when it works, i'll build it on a printed card. I hope everything goes well... =) the TTL IC's are: 74125 - 4 tri-state buffers 74244 - 8 tri-state buffers (linked in 2 groups of 4 buffers) 7496 - 5-bit shift register with paralel inputs

Eric R. Quinn Joined: 18 Sep 1999 Posts: 498 Location: Portland, Oregon USA	Re: more doubts about WR Posted: Sun May 28, 2000 6:51 pm
	Quote > I dont think MC-F' would help, since it is set low when writing to the FCRs AND when acessing RAM... But Ive been studying the SMS schematics ive found on this site, and i noticed that the signal that is used to write to RAM is ROM, and not WR. Since WR is connected to the system ROM (hang-on/safari hunt, i guess) and to the cartridge slot, i guess its really only used to write to the FCRs. O.k. Quote > But the schematics indicate that WR is actually WR, an active low signal, what would be more likely i think. But SMSARCH says WR is asserted (made high) wheneve writing to the FCRs, so now i dont know what to think.... Eric, when writing to the FCRs you set this signal high or low? I don't remember. I lost all the SMSARCH software in a hard drive crash, and the device has been disassembled and is no longer working. The only file that survived was the SMSARCH document you've been reading, because I had a copy available on the web. It seems likely that WR is really WR' and the "made high" comment is wrong. Quote > Also, i believe there is a way to be sure if those simplified logical functions for enabling writing to the FCRs (below) would work... It would require a little patience and time of yours, but it could be done with the rom dumper you built. > The procedure for a 2 or 4 mega cartridge would be: > 1 write a page number to $FFFE (eg $04) > 2 read an arbitrary byte on frame 1 (eg. $4BD2) > 1 write a different page number to $FFFE (eg $03) > 3 write the first page number ($04) to $0002 or whatever address ended with %10 > 4 read the same byte ($4BD2) > The same procedure for a 1 mega cartridge would be: > 1 write a page number to $FFFF (eg $04) > 2 read an arbitrary byte on frame 2 (eg. $A74C) > 1 write a different page number to $FFFF (eg $03) > 3 write the first page number ($04) to $0003 or whatever address ended with %11 > 4 read the same byte ($A74C) > if those bytes match, its very probable that these simplified logical functions for enabling writing to the FCRs do work! > F1IE = A1.A0.WR > F2IE = A1.A0.WR > [Of course, if WR is a active low signal, then it should be (WR) instead of WR] > > Do you think you could check this? Youve got to agree that implementing a 16-input AND on a printed card would be a lot of work... =) I can't. As I mentioned above, the SMSARCH is long gone. I wish I still had it, we could have resolved these probelms long ago! :-) Maybe someone else with a ROM dumper could help you. Quote > The rest of the team is working on a EEPROM writer, so i have to wait until its done to begin my experimentations with the fake cartridge. I'll first build it on the protoboard to test it, and when it works, i'll build it on a printed card. I hope everything goes well... =) Good luck. Quote > the TTL IC's are: > 74125 - 4 tri-state buffers > 74244 - 8 tri-state buffers (linked in 2 groups of 4 buffers) > 7496 - 5-bit shift register with paralel inputs Thanks. Eric Quinn

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