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  • Joined: 26 Feb 2021
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Codemasters mapper found in Micro Machines GG
Post Posted: Fri Mar 25, 2022 5:27 pm
Last edited by Apocalypse on Sat Mar 26, 2022 4:41 pm; edited 5 times in total
Not sure there is much interest for it but here is some info about the Codemasters mapper found in Micro Machines GG:
- supports 16 banks of 16KB in region 2 only
- made out of a TI16R4 PAL in PLCC20
- bank is selected by writing any byte in region 2 (0x8000-0xBFFF)

Pinout:

1 = CK (chip CLK signal)
2 = !WR
3 = D0
4 = D1
5 = D2
6 = D3
7 = !CE
8 = A15
9 = A14
10 = GND
11 = GND (chip !OE signal)
12 = OUT_A14
13 = OUT_A17
14 = latched D0
15 = latched D1
16 = latched D2
17 = latched D3
18 = OUT_A16
19 = OUT_A15
20 = Vcc

I have dumped it using brute-force (it's a registered device, secured) but haven't tested the dump yet. Will release it once confirmed working.

On a side note the ROM !CE signal is generated with a GD4011 (NAND gates) from !CE, A15 and A14 (equation is !ROM_CE = !CE & !(A15 & A14) thus covering 0x0000-0xBFFF as expected).

[EDIT]
Dump is valid and tested in a GAL16V8 on real hardware.
jed file has been attached as a txt file due to forum restrictions, just rename it to .jed
20220326_172227.jpg (2.79 MB)
20220326_172227.jpg
GG_MM_mapper.txt (1.7 KB)

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Post Posted: Fri Mar 25, 2022 5:30 pm
It's presumably identical to the one in other Codemasters games (except the ones with RAM expansion?). Paging is 16KB banks, not 32...
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Post Posted: Fri Mar 25, 2022 7:08 pm
I have a noob question about Codemasters games and SMS I:
We know that Codemasters games dont work in SMS with 315-5124 vdp But i saw this information:
Here's a list of all possible display modes:

M4 M3 M2 M1 SMS VDP SMS 2 / GG VDP
-- -- -- -- ---------- -------------------------
0 0 0 0 Graphic I Graphic I
0 0 0 1 Text Text
0 0 1 0 Graphic 2 Graphic 2
0 0 1 1 Mode 1+2 Mode 1+2
0 1 0 0 Multicolor Multicolor
0 1 0 1 Mode 1+3 Mode 1+3
0 1 1 0 Mode 2+3 Mode 2+3
0 1 1 1 Mode 1+2+3 Mode 1+2+3
1 0 0 0 Mode 4 Mode 4
1 0 0 1 Invalid text mode Invalid text mode
1 0 1 0 Mode 4 Mode 4
1 0 1 1 Invalid text mode Mode 4 (224-line display)
1 1 0 0 Mode 4 Mode 4
1 1 0 1 Invalid text mode Invalid text mode
1 1 1 0 Mode 4 Mode 4 (240-line display)
1 1 1 1 Invalid text mode Mode 4
https://www.smspower.org/uploads/Development/msvdp-20021112.txt
So, to achieve the highter resolutions M2 need is set. Probably are the bits used by Codemasters. I was thinking if i can do acess the rom and change the M2 bit cleared (presuming that is possible change bits in ROM) the game could display in 256 x 192 mode or it was designed for only highter resolutions and not will display? Sorry for my foolishness.
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Post Posted: Fri Mar 25, 2022 7:40 pm
segarule wrote
I have a noob question about Codemasters games and SMS I:
We know that Codemasters games dont work in SMS with 315-5124 vdp But i saw this information:
Here's a list of all possible display modes:

M4 M3 M2 M1 SMS VDP SMS 2 / GG VDP
-- -- -- -- ---------- -------------------------
0 0 0 0 Graphic I Graphic I
0 0 0 1 Text Text
0 0 1 0 Graphic 2 Graphic 2
0 0 1 1 Mode 1+2 Mode 1+2
0 1 0 0 Multicolor Multicolor
0 1 0 1 Mode 1+3 Mode 1+3
0 1 1 0 Mode 2+3 Mode 2+3
0 1 1 1 Mode 1+2+3 Mode 1+2+3
1 0 0 0 Mode 4 Mode 4
1 0 0 1 Invalid text mode Invalid text mode
1 0 1 0 Mode 4 Mode 4
1 0 1 1 Invalid text mode Mode 4 (224-line display)
1 1 0 0 Mode 4 Mode 4
1 1 0 1 Invalid text mode Invalid text mode
1 1 1 0 Mode 4 Mode 4 (240-line display)
1 1 1 1 Invalid text mode Mode 4
https://www.smspower.org/uploads/Development/msvdp-20021112.txt
So, to achieve the highter resolutions M2 need is set. Probably are the bits used by Codemasters. I was thinking if i can do acess the rom and change the M2 bit cleared (presuming that is possible change bits in ROM) the game could display in 256 x 192 mode or it was designed for only highter resolutions and not will display? Sorry for my foolishness.

This is not the right thread for this topic. This thread is about the mapper.
Just disabling the mode bit won't work because it also causes the nametable to behave differently and the "end of sprites"-indicator has a different value.
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Post Posted: Fri Mar 25, 2022 8:19 pm
Maxim wrote
It's presumably identical to the one in other Codemasters games (except the ones with RAM expansion?). Paging is 16KB banks, not 32...

16KB indeed. However the mappers page indicates that the bank is set by writing to the first byte of the region.
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Post Posted: Fri Mar 25, 2022 11:36 pm
Last edited by Maxim on Sat Mar 26, 2022 9:28 pm; edited 1 time in total
Yea, practically that is what the software does. It’s sensible that it only decodes the upper bits, but I suspect the Everdrive emulation may be inaccurate.
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Post Posted: Sat Mar 26, 2022 4:37 pm
Dumped file tested and attached in first post.
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Post Posted: Sat Mar 26, 2022 9:06 pm
Apocalypse wrote
Dumped file tested and attached in first post.


Very cool! Nice work. I saw you shared the JED file, do you want to share the CUPL source too? I'm always interested in such technical things. :)
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Post Posted: Sun Mar 27, 2022 2:29 am
Charles MacDonald wrote
Apocalypse wrote
Dumped file tested and attached in first post.


Very cool! Nice work. I saw you shared the JED file, do you want to share the CUPL source too? I'm always interested in such technical things. :)
você tambem fez este certo, eu tentei testar ele e nao tive sucesso. aquela porta 74ls02 esta correta? aqui so tive uma tela preta . voce ainda teria o cupl deste seu antigo Sr MAcdonald

isto seria 1 porta NOR? no desenho ? o simbolo nao esta correto.
smsmap_159.png (4.46 KB)
smsmap_159.png

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Post Posted: Sun Mar 27, 2022 2:36 am
Apocalypse wrote
Not sure there is much interest for it but here is some info about the Codemasters mapper found in Micro Machines GG:
- supports 16 banks of 16KB in region 2 only
- made out of a TI16R4 PAL in PLCC20
- bank is selected by writing any byte in region 2 (0x8000-0xBFFF)

Pinout:

1 = CK (chip CLK signal)
2 = !WR
3 = D0
4 = D1
5 = D2
6 = D3
7 = !CE
8 = A15
9 = A14
10 = GND
11 = GND (chip !OE signal)
12 = OUT_A14
13 = OUT_A17
14 = latched D0
15 = latched D1
16 = latched D2
17 = latched D3
18 = OUT_A16
19 = OUT_A15
20 = Vcc

I have dumped it using brute-force (it's a registered device, secured) but haven't tested the dump yet. Will release it once confirmed working.

On a side note the ROM !CE signal is generated with a GD4011 (NAND gates) from !CE, A15 and A14 (equation is !ROM_CE = !CE & !(A15 & A14) thus covering 0x0000-0xBFFF as expected).

[EDIT]
Dump is valid and tested in a GAL16V8 on real hardware.
jed file has been attached as a txt file due to forum restrictions, just rename it to .jed


amigo onde conecta este ? 1 = CK
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Post Posted: Sun Mar 27, 2022 3:02 am
I don't understand the question but I made that schematic a long time ago and don't have confidence it's correct. Let's assume it isn't, and please use whatever circuitry seems best for your application.
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Post Posted: Sun Mar 27, 2022 6:01 am
Last edited by Apocalypse on Sun Mar 27, 2022 6:40 am; edited 1 time in total
Charles MacDonald wrote
Very cool! Nice work. I saw you shared the JED file, do you want to share the CUPL source too? I'm always interested in such technical things. :)

Thanks Charles.

I don't have the CUPL source since my tool skips that extra step and generates directly the jed file using the cupl*.dlls

But feel free to reverse it using jedutil or any other tool of your choice, I also provided pinout in the first post so should be easy to rebuild a clean source file.
Of course you are welcome to share the source.
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Post Posted: Sun Mar 27, 2022 6:21 am
darleiv wrote
amigo onde conecta este ? 1 = CK

It's the clock signal from the console.
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Post Posted: Sun Mar 27, 2022 10:32 am
Apocalypse wrote
Dumped file tested and attached in first post.
Thank you, this is great!
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Post Posted: Sun Mar 27, 2022 12:36 pm
Apocalypse wrote
darleiv wrote
amigo onde conecta este ? 1 = CK

It's the clock signal from the console.


entendi .
mas nao entendo porque tem x2 d1 x2 x2 duplicados.
estes pinos servem pra qual função?
o ruim que jogos code master maioria so roda em 50 hertz

minha duvida é esta da foto .
Sem Título.jpg (42.26 KB)
Sem Título.jpg

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Post Posted: Sun Mar 27, 2022 12:37 pm
Charles MacDonald wrote
I don't understand the question but I made that schematic a long time ago and don't have confidence it's correct. Let's assume it isn't, and please use whatever circuitry seems best for your application.

perguntei se voce ainda tem o cupl do seu mapper . nao falei que ta errado. apenas disse que a porta nor 02 ta diferente do simbolo. aqui nao funcionou .
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Post Posted: Sun Mar 27, 2022 12:39 pm
Apocalypse wrote
Not sure there is much interest for it but here is some info about the Codemasters mapper found in Micro Machines GG:
- supports 16 banks of 16KB in region 2 only
- made out of a TI16R4 PAL in PLCC20
- bank is selected by writing any byte in region 2 (0x8000-0xBFFF)

Pinout:

1 = CK (chip CLK signal)
2 = !WR
3 = D0
4 = D1
5 = D2
6 = D3
7 = !CE
8 = A15
9 = A14
10 = GND
11 = GND (chip !OE signal)
12 = OUT_A14
13 = OUT_A17
14 = latched D0
15 = latched D1
16 = latched D2
17 = latched D3
18 = OUT_A16
19 = OUT_A15
20 = Vcc

I have dumped it using brute-force (it's a registered device, secured) but haven't tested the dump yet. Will release it once confirmed working.

On a side note the ROM !CE signal is generated with a GD4011 (NAND gates) from !CE, A15 and A14 (equation is !ROM_CE = !CE & !(A15 & A14) thus covering 0x0000-0xBFFF as expected).

[EDIT]
Dump is valid and tested in a GAL16V8 on real hardware.
jed file has been attached as a txt file due to forum restrictions, just rename it to .jed



voce poderia recompilar ele pro modelo 20v8? este 16v8 ta muito ruim achalo
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Post Posted: Mon Mar 28, 2022 11:56 am
@darleiv please try to write in English (I can read/guess Portuguese but not eveyone can).

To answer your questions:
- latched Dx signals are simply Dx signals "memorised", they aren't connected to anything but are used in the OUT_Ax equations
- as for compiling it for 20V8, first I don't have a PLD source (but could build one), secondly I don't see what's wrong with the 16V8.

They are still produced by Microchip under the ATF16V8 reference.
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Post Posted: Mon Mar 28, 2022 12:01 pm
My english is horrible but i will try help in understand:
Quote
voce poderia recompilar ele pro modelo 20v8? este 16v8 ta muito ruim achalo

Could you recompile it for 20v8 model? These 16v8 is hard to find.
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Post Posted: Mon Mar 28, 2022 1:18 pm
segarule wrote
Could you recompile it for 20v8 model? These 16v8 is hard to find.


You can get them from the usual suppliers:

https://www.mouser.dk/c/?q=16v8

https://fr.rs-online.com/web/c/?sra=oss&r=t&searchTerm=atf16v8

https://dk.farnell.com/c/semiconductors-ics/gals-pals-splds/splds?st=atf16v8

https://www.digikey.com/en/products/filter/embedded-plds-programmable-logic-devi...

Or from ebay or aliexpress but YMMV.
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Post Posted: Mon Mar 28, 2022 1:24 pm
@darleiv:
Visita esse site. Você acha o que ele está se referindo:
https://pt.aliexpress.com/af/atf16v8b.html?d=y&origin=n&SearchText=atf16...
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Post Posted: Wed Mar 30, 2022 4:07 am
segarule wrote
@darleiv:
Visita esse site. Você acha o que ele está se referindo:
https://pt.aliexpress.com/af/atf16v8b.html?d=y&origin=n&SearchText=atf16...

muito bom
não tinha conseguido achar este quadradinho.
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