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  • Joined: 28 Sep 1999
  • Posts: 1197
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Z80 reset stuff
Post Posted: Thu Nov 04, 1999 3:26 pm

This isn't strictly SMS related, but more of a general Z80
question.

I'm trying to get the Z80 working properly in a Genesis emulator.
The Z80 has it's reset line connected to bit 8 of $A11200. From
what I've read, setting bit 8 to zero 'requests' a reset, and
setting it to one 'cancels' a reset. (their terminology, not
mine :)

A common use seen in games is to write zero, fill the Z80 RAM
with program code and data, then write one. Does this mean for
the entire time the reset line is held, the Z80 does nothing at
all? Wouldn't leaving it reset in an extended state corrupt the
RAM connected to it, since the Z80 couldn't do any refereshing?

The CPU emulator I use only has an 'immediate' reset, you can't
control the reset line like MAME does, for instance. Would it
be advisable to do a reset only when there has been a
zero-to-one transition of the reset line?

Thanks
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Nyef
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Post Posted: Thu Nov 04, 1999 3:37 pm
Quote
> This isn't strictly SMS related, but more of a general Z80
> question.

Which should still be on topic...

Quote
> I'm trying to get the Z80 working properly in a Genesis emulator.
> The Z80 has it's reset line connected to bit 8 of $A11200. From
> what I've read, setting bit 8 to zero 'requests' a reset, and
> setting it to one 'cancels' a reset. (their terminology, not
> mine :)

I'll have to remember this for later... :-)

Quote
> A common use seen in games is to write zero, fill the Z80 RAM
> with program code and data, then write one. Does this mean for
> the entire time the reset line is held, the Z80 does nothing at
> all? Wouldn't leaving it reset in an extended state corrupt the
> RAM connected to it, since the Z80 couldn't do any refereshing?

Is it static or dynamic RAM? Is there a separate refresh system?

Quote
> The CPU emulator I use only has an 'immediate' reset, you can't
> control the reset line like MAME does, for instance. Would it
> be advisable to do a reset only when there has been a
> zero-to-one transition of the reset line?

I'd try stopping the CPU on a one-to-zero transition, and starting it
again with a reset on a one-to-zero transition.

Quote
> Thanks

--Nyef
 
Eric
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Post Posted: Thu Nov 04, 1999 4:27 pm
Quote
>
> This isn't strictly SMS related, but more of a general Z80
> question.

> I'm trying to get the Z80 working properly in a Genesis emulator.
> The Z80 has it's reset line connected to bit 8 of $A11200. From
> what I've read, setting bit 8 to zero 'requests' a reset, and
> setting it to one 'cancels' a reset. (their terminology, not
> mine :)

> A common use seen in games is to write zero, fill the Z80 RAM
> with program code and data, then write one. Does this mean for
> the entire time the reset line is held, the Z80 does nothing at
> all? Wouldn't leaving it reset in an extended state corrupt the
> RAM connected to it, since the Z80 couldn't do any refereshing?

Taken directly from Zilog's Z80 Product Specification (available on S8-Dev):

"As long as RESET# remains active, the address and data buses float, and the control outputs are inactive."

Later on the page, is a diagram showing that RFSH (the refresh control line) is inactive while RESET# is active.

Consequently, you should assume that the Z80's built in refresh logic is not working while RESET# is active.

However, the Z80's refresh logic is designed to ease implementation of systems built around the Z80. This is not the case in the Genesis. My guess is that the RAM mapped into Z80 address space is most likely refreshed using the same mechanism that refreshes ALL of Genesis RAM. Simply put, (in my opinion) it is probably safe to load the Z80 RAM with data, even though the Z80 RFSH line is inactive, because the RAM is being refreshed with some other mechanism.

Quote
> The CPU emulator I use only has an 'immediate' reset, you can't
> control the reset line like MAME does, for instance. Would it
> be advisable to do a reset only when there has been a
> zero-to-one transition of the reset line?

RESET# is an asynchronous signal, meaning it is not tied to any clock or clock-edge. You may want to avoid emulating it as edge-triggered. You should assume that as long as RESET# is active (the bit is 0) that the Z80 is in a reset state (i.e. all regs are 0, interrupts are disabled, and no instructions are being fetched or executed.) Based on your description above, on the Genesis, the RESET# line can be asserted for quite some time, you don't want the Z80 executing during any of that time.


Eric Quinn
 
  • Joined: 28 Sep 1999
  • Posts: 1197
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Post Posted: Thu Nov 04, 1999 6:06 pm

Quote
> I'll have to remember this for later... :-)

Actually, don't, I think I found a bug in the
documentation. It says:

A11200 : D8 = 0 Request reset
1 Cancel reset

What games do is write $0100, access stuff on the Z80's bus
like RAM, YM2612, etc., then write $0000. So it's likely
the function of this bit is reversed.


Quote
> Is it static or dynamic RAM? Is there a separate refresh system?

My mistake, it's static.

Quote
> I'd try stopping the CPU on a one-to-zero transition, and starting it
> again with a reset on a one-to-zero transition.

This seems to work well, I can see the Z80 stuffing data
into the PSG, so it must be a good sign. :)
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