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- Joined: 18 Sep 1999
- Posts: 498
- Location: Portland, Oregon USA
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Paging Doc Update
 Posted: Fri Jan 18, 2002 1:06 am
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All-
I've updated the paging document to include the sighting of a 315-5365 paging chip in a Casino Games cartridge. I've also updated the schematic of the 315-5235 to include the RESET pin.
The section of the paging document describing the 315-5365 is lacking. If anyone cares to summarize what is know about that chip, I'll update the paging doc with that information.
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Eric Quinn
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- Joined: 21 Apr 2000
- Posts: 598
- Location: Newcastle upon Tyne, England
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315-5365
Posted: Fri Jan 18, 2002 5:13 pm
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Quote > I've updated the paging document to include the sighting of a 315-5365 paging chip in a Casino Games cartridge. I've also updated the schematic of the 315-5235 to include the RESET pin.
Excellent! Can you also add the sighting of a 315-5365 chip in a Galaxy Force cartridge? This made it possible to determine how this chip is used with 512Kb ROMs, as shown in the diagram below.
Quote > The section of the paging document describing the 315-5365 is lacking. If anyone cares to summarize what is know about that chip, I'll update the paging doc with that information.
This updated diagram summarises the 315-5365 chip to the best of my knowledge. As you can see, there are still quite a few unknowns. The labels in brackets, i.e. (NC) [No Connection] and (GND), refer to how these pins are connected in all known cartridges that contain the 315-5365 mapper chip.
The 315-5365 can handle 32 x 16Kb ROM pages giving a total of 512Kb addressable space, and it supports paging in frames 0 (cartridge address 0x400-0x3FFF), 1 (0x4000-0x7FFF), and 2 (0x8000-0xBFFF).
The chip enable outputs are strangely configured. The output I have labelled _CEB is active for ROM addresses up to and including 0x3FFFF only, i.e. pages 0x00 to 0x0F, while _CEA is active for ROM addresses up to and including 0x7FFFF (pages 0x00-0x1F).
Note: If _CEB is used as the chip enable for a 256Kb ROM, pages 0x10 to 0x1F will be "blank" (i.e. they will consist entirely of 0xFF bytes). If _CEA is used as the chip enable for the same ROM, then pages 0x00 to 0x0F will be mirrored in pages 0x10 to 0x1F.
One thing that still needs to be determined is whether and how the 315-5365 can be used with SRAM for saved games.
Anyway Eric, feel free to use this image in the document, or use the info to update the existing pinout diagram.
Mike
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- Joined: 18 Sep 1999
- Posts: 498
- Location: Portland, Oregon USA
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Re: 315-5365
Posted: Fri Jan 18, 2002 9:18 pm
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Quote >
> Excellent! Can you also add the sighting of a 315-5365 chip in
> a Galaxy Force cartridge? This made it possible to determine
> how this chip is used with 512Kb ROMs, as shown in the diagram
> below.
Yes, I'll add Galaxy Force.
Quote > The 315-5365 can handle 32 x 16Kb ROM pages giving a total of
> 512Kb addressable space, and it supports paging in frames 0
> (cartridge address 0x400-0x3FFF),
You're sure that 0x0000 - 0x0400 is unpageable? (You can use the most recent version of "PFR Detect" to determine this, if you have a 5365-based development cartridge.)
Quote > Anyway Eric, feel free to use this image in the document, or
> use the info to update the existing pinout diagram.
I'll most likely just use the new image. I may update the other two schematics to include the "key" coloring as well.
Also, is RESET active-low on the 315-5235 (i.e., do I need to put a bar over it in the schematic)?
Thanks.
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Eric Quinn
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- Joined: 21 Apr 2000
- Posts: 598
- Location: Newcastle upon Tyne, England
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Some more info
Posted: Fri Jan 18, 2002 9:31 pm
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Eric, your request prompted me to do a bit of experimenting with a 315-5365 based cartridge, and I've since discovered a couple more things.
Firstly, there is a third Chip Enable output at pin 16. I've renamed the Chip Enable outputs _CE0, _CE1 and _CE2 to avoid confusion as to their purpose.
Secondly, pin 25 is a "jumper pin" which determines the behaviour of the Chip Enable outputs, according to whether it is set high or low. I've called this the ROM Type pin. Basically it sets the address ranges for the Chip Enable outputs, as follows:
ROM Type low (0v):
_CE0 0x00000-0x7FFFF
_CE1 0x00000-0x3FFFF
_CE2 0x40000-0x7FFFF
ROM Type high (+5v):
_CE0 0x00000-0x1FFFF
_CE1 0x20000-0x3FFFF
_CE2 0x40000-0x7FFFF
I've updated the diagram to show these changes:
<img src="http://www.mikeg2.freeserve.co.uk/masterful/315-5365b.gif">
Having these separate, configurable Chip Enable outputs could allow a game to be spread across two or even three physical ROM chips, without the need for any additional logic devices.
This facility was used on some commercial cartridges. For example, I have a Japanese Mark III Space Harrier cartridge which contains two 128Kb ROM chips, each wired to a separate Chip Enable output of the mapper.
Mike
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- Joined: 21 Apr 2000
- Posts: 598
- Location: Newcastle upon Tyne, England
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Re: 315-5365
Posted: Fri Jan 18, 2002 9:57 pm
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Quote > You're sure that 0x0000 - 0x0400 is unpageable? (You can use the most recent version of "PFR Detect" to determine this, if you have a 5365-based development cartridge.)
IIRC from earlier testing, yes, 0x0000-0x0400 is unpageable. I can give it a try with PFR Detect to confirm it though.
Quote > Also, is RESET active-low on the 315-5235 (i.e., do I need to put a bar over it in the schematic)?
Yes it is. All of the control signals are active low to my knowledge.
Mike
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