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  • Joined: 31 May 2019
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Gamegear flashcart with cpld mapper
Post Posted: Tue Jun 09, 2020 2:39 am
I need tout help guys.
I've came across rene's SMS mapper from db-electronics on github and was wondering if it could be easily ported to gamegear? I was hoping to develop a 8mb flashcart using a altera 5m40ze64 cpld. I'll need level shifters LVC16245A. I'll need to pull down /gg. Il was wondering if any other things needs to be taken into consideration.

Thanks for the hints
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Post Posted: Tue Jun 09, 2020 7:57 am
No, the mapper is identical between SMS and GG.
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Post Posted: Tue Jun 09, 2020 9:17 am
This may be of interest..

https://www.smspower.org/forums/12931-GameGear1MegaByteMemoryInterfaceUsing3155912MapperFinallyWorking

Several existing game gear games use an external mapper so you may be able to use one of those with a new rom.
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Post Posted: Tue Jun 09, 2020 3:42 pm
I've seen this flash cart, its a nice project :) But I'd like to avoid salvaging donnor cartridge.

I was thinking using Db-electronics sms vhdl mapper

And porting it to a altera 5m40ze64 cpld in Quartus II.

I removed the serial eeprom stuff since I dont think i need it.
Someone could check the vhdl code to see if its OK

For the Rom since Altera V cpld I/O's are 3.3v tolerant, I need a 3.3v.
I was thinking something like a MX29L3211 since its widely affortable. Any other suggestion? It could also be a tsop, I have adapters here.

From cartridge edge bus A0~A13 directly to ROM (level shifted off course ;) A15~A19 would come from the Altera CPLD.

Since I'm planning to use a 3.3v instead of 5v Rom, do I need to open-drain high addresses and WE and CE with 1k pull up?

Ram part seems pretty easy stuff.

I'll work on the schematic and share it with you guys, lets make it together :D

Thanks for your hints.
SMSMapper.vhd (5.14 KB)

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Post Posted: Tue Jun 09, 2020 8:38 pm
Wouldnt a 5v rom be a little simpler to design with? Youd then only need to level shift between the cpld and rom instead of the entire rom.
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Post Posted: Tue Jun 09, 2020 10:07 pm
at first I was thinking using AM29F16D Rom wich is 5v, but then the issue is with the Altera cpld, its only 3.3v tolerant.

Looking at the mapper its needs inputs A0~A15 & D0~D7 from the Gamegear bus so I still need to level shift the whole bus.
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Post Posted: Sat Jun 27, 2020 4:58 pm
This looks like a really interesting project! And yeah, modern flash cartridges (for example) do indeed level shift the whole bus.

Any interest in also including "cartridge audio" hardware for FM sound in your Game Gear games? The Game Gear cartridge bus supports it, and the games themselves only need very minor patching to use it (basically to just assume FM is available, rather than probing for it which won't work.)

Also, any interest in including 32KB of cartridge RAM too, ideally with either socketed backup battery or backup to flash? I believe this can make it a bit less constricting to develop new homebrews for the platform and also aid in porting some of the MSX1 library to Game Gear. If it can additionally be mapped into the end of the first page this could make it able to run games originally built for the Jumbo/DahJee RAM adapter.

Another feature that could be very useful when trying to port MSX1 games and Korean SMS games would be support for an alternate 8KB paging granularity, where there are 6 pageable 8KB regions in the regular cartridge address space (8 if the Game Gear internal RAM is switched off) instead of just 3 16KB ones (or 4 with internal RAM off.)

If each of these pages can additionally be mapped to RAM instead of ROM (especially if the cartridge RAM supports a paging model too and there is a lot of it) under program control, porting from many other 8-bit systems (e.g. ZX Spectrum or even some CP/M machines, with disk emulated by RAM or ROM) becomes viable, and it also becomes a very valuable development tool. If the write access can additionally be toggled off and on for a page of RAM through mapper control, suddenly more capabilities become available (e.g. dynamic patching a la Game Genie where different patches can be toggled on and off without re-flashing or replacing the ROM.)

Finally, when you write 8mb is that 8 megabytes or 8 megabits? If it's 8 megabytes (or even 4, the limit I believe for Sega mapper ROM paging) I am very interested! If it's 8 megabytes, is there a separate control register for the "high bit" of the paging register?
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Post Posted: Mon Jun 29, 2020 12:54 am
bsittler wrote
Any interest in also including "cartridge audio" hardware for FM sound in your Game Gear games? The Game Gear cartridge bus supports it, and the games themselves only need very minor patching to use it (basically to just assume FM is available, rather than probing for it which won't work.)


Are the audio inputs meant for the tv tuner actually active when a game is inserted? Or only in tv mode?

Why wouldn't probing work on the game gear? Due to lack of the /joydis pin to disable the io chip during probing?
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Post Posted: Tue Jun 30, 2020 10:08 pm
Here is the schematic I'm working on.
I already included the vhdl mapper.
Any thoughts about it so far?
gg.pdf (54.57 KB)

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Post Posted: Tue Jun 30, 2020 11:30 pm
Do you need to pull ram /we high as well, like you have with ram /ce, just as a safety measure during power up or down? Those expensive sram battery controller chips do that.. but it may not be essential.
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Post Posted: Thu Jul 02, 2020 5:34 am
wasup wrote
bsittler wrote
Any interest in also including "cartridge audio" hardware for FM sound in your Game Gear games? The Game Gear cartridge bus supports it, and the games themselves only need very minor patching to use it (basically to just assume FM is available, rather than probing for it which won't work.)


Are the audio inputs meant for the tv tuner actually active when a game is inserted? Or only in tv mode?

Why wouldn't probing work on the game gear? Due to lack of the /joydis pin to disable the io chip during probing?


Audio inputs do indeed work outside TV mode. Verified by covering TV mode pins on the tuner with nonconductive tape.

Probing problem is only assumption on my part, indeed due to missing the pin.
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Post Posted: Mon Aug 10, 2020 8:58 pm
I recently received the flashcart and I'm having an issue.
Some games are acting differently on the real hardware compared to the emulator. Here is a video I made comparing the emulator and the real hardware.



It may be the vhdl mapper.

I would realy like to fix this issue, but my understanding of mapper, debugger, memory is kinda limited.

I downloaded meka debugger... anyone can help me with this one?
Thanks
SMSMapper.vhd (5.14 KB)

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Post Posted: Tue Aug 11, 2020 7:55 am
I’d suspect an issue with the translation patch, better to test with original games.
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Post Posted: Tue Aug 11, 2020 1:48 pm
I tried with both original japanese version and english patched version.
Same issue, up to the titre screen, everything is fine, but once I start a game, it freezes.

Here is a video showing debugger emulator and real hardware.


Can someone help me out with one please?
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Post Posted: Tue Aug 11, 2020 1:54 pm
Is this game using save RAM? Are you supporting that? Do other games work?
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Post Posted: Tue Aug 11, 2020 2:59 pm
Since you asked, I've did a test with another game that doesnt requires RAM, Sonic Blast, it seems to be working fine.



So there might be a flaw with $fffc in the VHDL code.
Anyone knowing VHDL can help me please?
Thanks
SMSMapper.vhd (5.14 KB)

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Post Posted: Tue Aug 11, 2020 4:48 pm
Try the PFR Detect homebrew. It is an SMS tool so you will probably need to enable SMS mode.
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Post Posted: Tue Aug 11, 2020 7:14 pm
Luckily, I've included a sms/gg jumper to switch mode.
I tried the pfr_detect utility using the same board I've put SonicBlast

$0000-03FF.........Fixed
$0400-3FFF.........Fixed
$4000-7FFF.........Pageable
$8000-8FFF.........Pageable
Backup Page 0.......Doesn't exist
Backup Page 1.......Doesn't exist



So there is definetly something with the SRAM.
Should I investigate the wiring of the VHDL?
Anyone have any idea at this point?
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Post Posted: Tue Aug 11, 2020 10:03 pm
I think I found an issue.

I added a common based amplifier to my backup circuit to the fpga doesn't drain the ram when the circuit is unpowered.

I used !rst as the base of my bjt transistor.
When I connect the fpga sram!ce directly to the ram, the PFR_detect page 0 and page 1 of the backup ram.

It also fixed Lunar.



Any idea what base I should use instead?
backup.JPG (46.31 KB)
backup.JPG

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Post Posted: Sun Sep 06, 2020 6:45 pm
So far I tried couple of games with success, but Phantasy Star adventures is giving me trouble.

Its kinda like the tilemap is mixed up.
At first, even the sega logo intro screen was like this.
I managed to fix the sega logo screen by removing the A16 pull-up resistor.

its only a 128kb rom, I tried filling it to 1024kb by mirroring it, but same result.

I also tried lifting rom pins A19, A18 and A17 and still the tilemap glitch.

Here is a video showing what is going on.


Any suggestion?
Thank you guys
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Post Posted: Sun Sep 06, 2020 8:48 pm
edit: Your video shows the symptoms of writes to mapper register FFFF being completely ignored. Depending on whether your CPLD already initializes the registers to 00 00 01 02, it's possible all mapper register writes are ignored by the CPLD. To reproduce this in an emulator change the mapper write at address 57ec from 32 ff ff to three NOP's 00 00 00

Original comment:
Likely not helpful, but the original Japanese release of Phantasy Star Adventure I'm using (dumped myself but matches the checksums I've seen online - CRC32 1a51579d with size 128 KBytes) writes the following Sega mapper register values by the time the new game name entry screen is displayed:

FFFC 00
FFFD 00
FFFE 01
FFFF 02 02 06 02 05 02 04 02 07 02 03 02 06 02 05 02 03 02

Is this the same pattern you're seeing? You might need a logic analyzer capture to see this. Also, are you using the same build of the game?
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