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WLA-DX: How to handle data that spans two banks without clean split?
Post Posted: Wed Feb 27, 2019 1:31 pm
Given a standard SMS memory layout of:

.MEMORYMAP
        SLOT            0       START $0000 SIZE $4000  ; ROM 0
        SLOT            1       START $4000 SIZE $4000  ; ROM 1
        SLOT            2       START $8000 SIZE $4000  ; ROM 2
        SLOT            3       START $C000 SIZE $2000  ; 8KB RAM
        DEFAULTSLOT     0
.ENDME

.ROMBANKMAP
        BANKSTOTAL      16              ; use 16 banks,
        BANKSIZE        $4000           ; each 16 KB in size
        BANKS           16              ; (that's 256 KB)
.ENDRO


How would I handle situations where I have data that has to span two contiguous banks+slots. e.g. the data runs continuously filling bank 4 & 5 of the ROM, paged into slot 1 + 2, where it's not possible (important!) to split the data at the bank/slot boundary?

Now, I could create a specific WLA-DX Slot that spans 32KB, e.g.:

        SLOT            101     START $4000 SIZE $8000


But I've honestly no idea how this would interoperate with the 16 KB banks within the same space. Which order would the banks get packed? WLA-DX would not know that the original slots and the custom slot share the same space and ROM, right? One bank of the custom slot (32KB) would not advance 2 banks of the others.

Any guidance, would be appreciated -- this is going towards the Sonic 1 SMS disassembly.
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Post Posted: Wed Feb 27, 2019 2:16 pm
Have a look at https://github.com/maxim-zhao/sms-hq-samples/blob/master/Common/addfile.asm which is something I made to solve this issue. It has some logic specific to pcmenc (encoding the block length as a prefix to each chunk, and splitting on three byte boundaries) so you should be able to simplify it, but then it may need more complexity for multi slot paging.
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Post Posted: Thu Feb 28, 2019 9:24 am
I would create two 'force'd section at $0 in banks 4 & 5, to say, incbin the first 16 KB of the data into the first and the remaining part in the second (use 'skip'). But you surely have to map them to slots 1 & 2 anyway...
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Post Posted: Thu Feb 28, 2019 12:33 pm
That wouldn't preserve the labels, which are needed. Doesn't look like there's an easy solution to this without improvements to WLA-DX
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Post Posted: Thu Feb 28, 2019 12:43 pm
Last edited by sverx on Thu Feb 28, 2019 12:44 pm; edited 1 time in total
what about having a totally different memory map? such as:

.MEMORYMAP
        SLOT            0       START $0000 SIZE $4000  ; ROM 0
        SLOT            1       START $4000 SIZE $8000  ; ROM 1 & 2
        SLOT            2       START $C000 SIZE $2000  ; 8KB RAM
        DEFAULTSLOT     0
.ENDME


of course each time you map some :label to slot1, you also have to map :label+1 onto slot2 but it may work...
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Post Posted: Thu Feb 28, 2019 12:44 pm
I think I don't understand what you're trying to achieve here - I thought you want to say "include this file" and have it work across bank boundaries, and you manage your own labels.
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Post Posted: Thu Feb 28, 2019 1:03 pm
Note that as soon as you use non-16KB banks it breaks the numbering for :labels.
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Post Posted: Thu Feb 28, 2019 2:00 pm
Maxim wrote
Note that as soon as you use non-16KB banks it breaks the numbering for :labels.


mmm... wait.
The first bank would be 16 KB, and it's going to be bank #0
The second bank would be 32 KB, and it's going to be bank #1
The third bank would be 32 KB, and it's going to be bank #2
and so on...

so he'll probably always have to map (:label*2)-1 into slot1 and (:label*2) into slot2. Correct?

Of course he needs some different ROMBANKMAP:

.ROMBANKMAP
        BANKSTOTAL      9
        BANKSIZE        $4000           ; 16 KB in size - won't page
        BANKS           1           
        BANKSIZE        $8000           ;  32 KB in size - will page these
        BANKS           7             
        BANKSIZE        $4000           ; 16 KB in size  - unused (?)
        BANKS           1              ; (that's 256 KB)
.ENDRO
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Post Posted: Thu Feb 28, 2019 10:16 pm
But that will also fall apart of you try to select the bank number of a label in the upper 16KB of the slot.

The real answer is to make WLA DX support overflowing the slot - internally it lays out the ROM using ROM space but it also makes sure you don't overflow the slot (as it has no idea how to ensure the result is sensible in CPU address space or how to compute labels after this has happened), I guess this check could be made suppressible.

Another approach could be to allow multiple ROM bank maps, or to allow placing chunks of data in ROM space without worrying about labels.

The last part - which seems very hard to me - would be to allow automatic placement of data chunks across page boundaries, and to let the code know if that has happened. Since this would then change what the code needs to do, I suspect it's beyond what an assembler can sensibly do.
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Post Posted: Fri Mar 01, 2019 9:31 am
It would have to be 'opt-in' since, yes, the assembly code would have to be aware. What I'm dealing with in the Sonic 1 disassembly is multiple instances of slot 1 + 2 combined; when the data itself spans more than two banks, the assembly code shifts the 'window' along the ROM to accommodate e.g. regardless of starting bank, only data in bank+1 is within slot 2. If some data begins in slot 2, the assembly code shifts the bank down into slot 1 so that there's no possibility of an overflow into a non-existent slot.
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Post Posted: Fri Mar 01, 2019 11:00 am
thus the start addresses of data are always $4000-$7FFF?
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Post Posted: Fri Mar 01, 2019 5:16 pm
Always.
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