Forums

I was repairing a Mega Drive this week that plays SMS games fine but won’t even boot for Mega Drive games (FYI I found the fault - the 68000 CPU is dead).

During the repair I bounced some thoughts off an esteemed and respected colleague. He told me that when a Mega Drive is in SMS mode, the 68000 scratchpad RAM is used by the Z80 instead of the 8KB SRAM which would mean the 68000 scratchpad RAM is working fine.

I’d never heard this before and found it odd that the Z80 would be using the 68000's RAM instead of its own RAM so I checked with my CRO and sure enough, when a Mega Drive is in SMS mode it is using one of the two 32KB 68000 scratchpad RAM chips (IC 2 to be exact) instead of the 8KB RAM!

The 2nd fact is that the Mega Drive draws 560mA of current when operating in SMS mode.

Did anyone else know this out of interest?

The RAM thing I discovered many years ago, probably that's where the info started spreading lol.

I have not measured power use in various modes however.

Yes, this also somehow explains the use of IA14 signal on the schematics which is connected to IC2 instead of VA14 as on the 2nd RAM chip.

Indeed, on a real Master System, internal RAM is selected when ZA14=ZA15=1 and is addressed by ZA0-ZA12 while ZA13 is ignored (8KB mirrored in 16KB upper area of memory map)

In Mega Drive SMS mode, ZA0-ZA15 are directly mapped to VA1-VA16 (through the bus arbiter and I/O chips), so, in order to make 68k RAM ignores ZA13/VA14 (and mimic the RAM mirroring), they had to use another signal to force the state of that RAM address line (presumably high since VA15/ZA14 is also high when RAM is accessed)

The master system uses PSram not SRAM... so in mega drive the 8kb sram chip for the z80 can not be used in real sms mode..

so it uses one of the two 32kb PSRam chips.

I don't think that's the reason. The Z80 will happily work with either RAM chip. Some later Master Systems were even fitted with SRAM.

I thought it might be some sort limitation with the Bus Arbiter in SMS mode maybe?

Yes, even the RAM chip used in Master System 1 (which is referenced as XRAM in datasheets) uses SRAM interface, identical to Z80 RAM in Mega Drive.

I think the reason is design choice: Z80 address bus is not connected to cartridge port and they re-used existing feature of Mega Drive mode which connects Z80 address/data bus to 68k address/data bus (needed for Z80 banked access to 68k bus) in SMS compatibility mode.

It was then surely simpler to re-use 68k address bus decoding logic in bus arbiter and VDP chips (with some logic modification when SMS mode pin is active) rather than handling additional chip select signals in Z80 bus address logic or modify both logics for SMS mode.

On early MD1 units (1988 VA0s) the Z80 work RAM for MD mode was also a PSRAM/XRAM chip but the refresh from Z80 is not used on pin 1. They use refresh pulse from the bus arbiter so the XRAM keeps the data alive while the Z80 is halted... I think the electrical connection and the pin on the bus arbiter IC to refresh the Z80 PSRAM still existed on MD1s up to VA6.

Very likely when these 8KB PSRAMs became difficult to source they decided to stuff the boards with 6264s for cost reasons.

Author	Message
asynchronous Joined: 14 Aug 2000 Posts: 741 Location: Adelaide, Australia	Mega Drive in SMS Mode - 2 Facts Posted: Sun Aug 19, 2018 3:35 pm
	I was repairing a Mega Drive this week that plays SMS games fine but won’t even boot for Mega Drive games (FYI I found the fault - the 68000 CPU is dead). During the repair I bounced some thoughts off an esteemed and respected colleague. He told me that when a Mega Drive is in SMS mode, the 68000 scratchpad RAM is used by the Z80 instead of the 8KB SRAM which would mean the 68000 scratchpad RAM is working fine. I’d never heard this before and found it odd that the Z80 would be using the 68000's RAM instead of its own RAM so I checked with my CRO and sure enough, when a Mega Drive is in SMS mode it is using one of the two 32KB 68000 scratchpad RAM chips (IC 2 to be exact) instead of the 8KB RAM! The 2nd fact is that the Mega Drive draws 560mA of current when operating in SMS mode. Did anyone else know this out of interest?

TmEE Joined: 31 Oct 2007 Posts: 853 Location: Estonia, Rapla city	Posted: Sun Aug 19, 2018 5:59 pm
	The RAM thing I discovered many years ago, probably that's where the info started spreading lol. I have not measured power use in various modes however.

Eke Joined: 06 Feb 2009 Posts: 110 Location: Toulouse, France	Posted: Mon Aug 20, 2018 10:28 am
	Yes, this also somehow explains the use of IA14 signal on the schematics which is connected to IC2 instead of VA14 as on the 2nd RAM chip. Indeed, on a real Master System, internal RAM is selected when ZA14=ZA15=1 and is addressed by ZA0-ZA12 while ZA13 is ignored (8KB mirrored in 16KB upper area of memory map) In Mega Drive SMS mode, ZA0-ZA15 are directly mapped to VA1-VA16 (through the bus arbiter and I/O chips), so, in order to make 68k RAM ignores ZA13/VA14 (and mimic the RAM mirroring), they had to use another signal to force the state of that RAM address line (presumably high since VA15/ZA14 is also high when RAM is accessed)

nuno14272 Joined: 10 Aug 2017 Posts: 31	Posted: Mon Aug 20, 2018 3:53 pm
nuno14272 Joined: 10 Aug 2017 Posts: 31	The master system uses PSram not SRAM... so in mega drive the 8kb sram chip for the z80 can not be used in real sms mode.. so it uses one of the two 32kb PSRam chips.

asynchronous Joined: 14 Aug 2000 Posts: 741 Location: Adelaide, Australia	Mega Drive in SMS Mode - 2 Facts Posted: Tue Aug 21, 2018 12:36 pm
	I don't think that's the reason. The Z80 will happily work with either RAM chip. Some later Master Systems were even fitted with SRAM. I thought it might be some sort limitation with the Bus Arbiter in SMS mode maybe?

Eke Joined: 06 Feb 2009 Posts: 110 Location: Toulouse, France	Posted: Tue Aug 21, 2018 1:02 pm
	Yes, even the RAM chip used in Master System 1 (which is referenced as XRAM in datasheets) uses SRAM interface, identical to Z80 RAM in Mega Drive. I think the reason is design choice: Z80 address bus is not connected to cartridge port and they re-used existing feature of Mega Drive mode which connects Z80 address/data bus to 68k address/data bus (needed for Z80 banked access to 68k bus) in SMS compatibility mode. It was then surely simpler to re-use 68k address bus decoding logic in bus arbiter and VDP chips (with some logic modification when SMS mode pin is active) rather than handling additional chip select signals in Z80 bus address logic or modify both logics for SMS mode.

l_oliveira Joined: 29 Jan 2014 Posts: 95 Location: Brasilia, Brazil	Posted: Tue Sep 04, 2018 9:59 pm
	On early MD1 units (1988 VA0s) the Z80 work RAM for MD mode was also a PSRAM/XRAM chip but the refresh from Z80 is not used on pin 1. They use refresh pulse from the bus arbiter so the XRAM keeps the data alive while the Z80 is halted... I think the electrical connection and the pin on the bus arbiter IC to refresh the Z80 PSRAM still existed on MD1s up to VA6. Very likely when these 8KB PSRAMs became difficult to source they decided to stuff the boards with 6264s for cost reasons.

Forums

View topic - Mega Drive in SMS Mode - 2 Facts