PDF

1980_Arizona_Technical_Symposium_Draft.pdf

Images

OCRed text

THE TMS 9918 VIDEO DISPLAY PROCESSOR

A BRIEF OVERVIEW

Karl Guttag

Texas Instruments

ABSTRACT

The TMS 9918 Video Display Processor (VDP) is presented in this paper. The VDP provides high resolution color graphics in combination with object oriented graphics for display on an ordinary television receiver or simple monitor. In addition to briefly describing some of the features of the VDP, this paper presents some of the reasons why these features are applicable to home computer systems and other systems requiring color graphics or animation and some suggested applications.

INTRODUCTION

Home computing systems should reach wide popularity in the 1980's. It is expected that most of the early home computers will take advantage of existing television receivers in the home in order to reduce initial costs to the consumer. These systems will, therefore, require devices such as the TMS 9918 Video Display Processor (VDP) to interface the computing system to the television set. These computer systems will not only perform data processing (as is commonly done on current computer systems), but will also provide educational material and home entertainment. The VDP was designed to support all these functions.

DEFINITIONS

Since certain terminology differs from article to article on video display applications, and for the benefit of those new to the art, a few of the terms used in this article are presented below: Memory Mapped Graphics - A list of memory data entries, each entry defines one spot on the screen. The order of the list determines where on the screen the entry is shown.

usually points to the shape data stored in the pattern generator. The name can be used to point to the shape of a relatively static object, such as a letter, or can be used in a dynamic fashion where several different names point to different orientations of a single object (such as a wheel rotating or car turning a corner).

cells, each cell containing a number of pixels. A list of NAMES, one NAME for each cell on the screen, points to where to get the data to define the cell. The shape of the figure, pointed at by the NAME, is generally defined by a series of bytes of data called the pattern generator. Pattern graphics is generally more memory efficient than memory mapped graphics. Textual display usually uses pattern graphics where the NAME points at the letter's (or the like) shape in the pattern generator (often called the character generator).

of a Names position in a list defining where the shape (or object) pointed at by the NAME will be shown, the Object's position is given explicitly in terms of horizontal and vertical location. Object oriented graphics is very useful in action games, since it is very easy to move objects around, as opposed to pattern graphics or memory mapped graphics where the screen must be "recomputed" when characters move.

screen.

BACKGROUND

Until recently, digital computer interfaces to ordinary television receivers involved a number of SSI and MSI I.C.'s in order to generate simple textual information, and usually these systems were black and white only. As home video games became popular, a number a devices were introduced that gave color capability and reduced chip count and cost; the resolution of these systems, while sufficient for simple video games, is too low for home computer applications or for more sophisticated game applications. Products like Motorola 6847 further reduce chip count, has high enough resolution to give 32 characters per line, but has only simple memory mapped color graphics and trades off color variety for higher resolution.

The VDP represents a new generation in video display systems. The VDP can display 15 colors in high resolution pattern graphics or lower resolution memory mapped graphics. The VDP supports advanced object oriented graphic characters (called sprites), and has prioritized display planes for 3-D effects. In addition to giving complex screen effect, the VDP was designed to give simple low cost system configurations for home computer applications, and can be very simply connected to any existing computer system.

A BRIEF TMS 9918 (VDP) DESCRIPTION

TABLE 1. VDP KEY FEATURES

Table 1. Gives a summary list of the major features of the VDP, most of which are to be described in this paper.

HIGH RESOLUTION COLOR VIDEO DISPLAY

The VDP provides a 256 by 192 pixel active display area. Since the horizontal scan frequency is fixed for an ordinary T.V., it required the VDP to have a horizontal dot rate of approx. 5.4 Mhz. Most products today have a dot rate of 3.58 Mhz or less Which results in having less pixels and therefore less character cells horizontally across the screen. At 5.4 Mhz, 32 8x8 characters can fit per row, at 3.58 Mhz, only about 20 characters will fit. The 5.4 Mhz dot rate generates a square aspect ratio (i.e. the vertical pixels are about as far apart as horizontal pixels), at 3.58 Mhz, a figure drawn as a binary square will be oblong horizontally due to the slower display rate, (see Fig. 1)

The VDP can display 15 different colors on the same screen in the high resolution (256 by 192 pixel) pattern graphics mode; this gives the VDP the highest resolution full color capability of any single or few chip display systems to date. The VDP's resolution is near the limit for ordinary color television; to obtain much higher resolution than the VDP gives, would require a color monitor with direct gun drive, but monitors of this type are currently too expensive for general home use. Therefore, the VDP color resolution is about the highest practical for home computers using ordinary television receivers.

FIGURE 1. DISPLAY VS. DOT RATE

COMPOSITE VIDEO

The color composite video signal in a single chip video controller is a first in the industry. The VDP's signal contains all burst, blanking, sync, and color signals for a standard non-interlaced T.V. signal. An external pull down resistor and R.F. modulation are all that is required to connect the VDP to a normal T.V. In the future, more televisions should have a video input due to the increase in non-broadcasted applications for the T.V. such as VCR and digital computer terminals so that the R.F. modulation may not be needed. The composite video output also facilitates the chaining of multiple VDP's using external video capabilities in order to generate more sophisticated video effects.

EXTERNAL VIDEO CAPABILITY

The VDP has an internal summing network and gating control to selectively gate through external video information. The VDP uses a 4 bit color code that allows for 15 different colors and a transparent code. When in the external video mode and transparent is to be shown on the screen, the VDP gates through the external video source. The external video source is also gated through during horizontal and vertical retrace to provide burst, blank, and sync signals. An external synchronization input is provided to the VDP to give the external source control over the VDP's horizontal line time and number of vertical lines so that the VDP can match the external source. A 3.58 Mhz clock output is provided by the VDP so that external phase lock circuitry can compare this clock against the burst signal of the external source to provide color phase locking by controlling the phase of the VDP's input clocks. This arrangement allows for both non-interlaced and interlaced external source since the VDP is slaved to the external control signals.

The applications for external video are numerous. The VDP can be used to provide text on a T.V. picture for the hard of hearing, and since the text is applied locally (with the information sent during retrace), those who don't desire the text do not have to be distracted by it. There are many ways the VDP can be used for educational applications using either off-air or recorded video information; for instance, answers can be masked on the screen until a correct response is provided and visual congratulations can be added to the picture. Multiple VDP's can be chained together with one VDP's video output going to the next's external video input to create more spectacular video effects. In applications for color monitor use, a higher resolution black and white text source can be combined with the VDP's color graphics capability. The external video capability will probably be used for a wide variety of applications and has, so far, had high user interest.

DYNAMIC MEMORY INTERFACE

The VDP was designed for simple direct connection to low cost dynamic RAMS (Dynamic RAMS are typically 3 to 4 times cheaper than equivalent static memories). The VDP generates row and column addresses as required by standard dynamic memories and can be programmed to format addresses for 4K or 16K memories. The VDP uses 8 bit wide data paths to and from memories with data out being multiplexed with the addresses. The memory connected to the VDP for display is called the VRAM (Video-RAM). The VDP generates all dynamic memory control signals, does all necessary refreshing of the memories, and acts as the interface between the CPU and the memories so that no external control, latches, or refresh circuitry is needed, and thus, the full cost advantage of the dynamic memories can be realized and simpler system design achieved. Detailed color graphics requires relatively large amounts of memory, and with low cost RAM available, even low cost systems can have full color capability.

Since low cost RAM is available with the VDP, other system costs can also be reduced. For example, in home computer applications, it is necessary to redefine pattern generators (the data that describes pattern shapes) according to the application. The pattern generators can be contained in very low speed (and thus low cost) solid state ROM or other low cost storage medium that can be plugged into the system according to the application and then transferred to the higher speed RAM for display. In other systems that do not have RAM available, the generators must be in higher speed ROM's (since these ROM's must be accesses during display) thus causing a higher recurring cost with each new application. The add on ROM costs are about one third that necessary for ROM that are fast enough for display. Additionally, having a fast interface to plug in devices can cause noise problems requiring more elaborate shielding around the plug in areas.

The VDP allows the CPU to read and write to the RAM and thus the dynamic RAMs can be used for low cost scratch-pad and program store. The amount of display and CPU memory is dynamically allocatable from application to application with the VDP, because all display tables have base addresses that allow tables to be placed in various parts of memory.

CPU INTERFACE

The CPU interface on the VDP uses a general purpose 8 bit data bus with three control signals which have timing very similar to most microprocessor bus structures, thus making it easily usable by most systems with a minimal amount of interface hardware. The CPU interface is used to load data and table base addresses into the VDP, read VDP status, and to transfer display and other data to and from the display memory (VRAM) connected to the VDP. (See fig. 2 for system configuration) Since the VDP acts as the interface to the display memory, there is no need for Direct Memory Access (DMA) or other support chips to access the display memory; the VDP automatically schedules CPU accesses to not conflict with display accesses.

The VDP has a 14 bit auto-incrementing address register that is loaded by the CPU, for addressing up to 16K of memory. When the CPU is reading data, the VDP always reads the next memory location after the CPU gets the current location's data; this is useful for display applications and for data and program storage as well. The auto-incrementing address feature speeds up and simplifies the transferring of data to and from VRAM where data is sequentially ordered (such as display tables). One possible application is to store instructions for interpretation in VRAM; while the VDP automatically fetches the next memory location (in this case the next instruction), the CPU can be interpreting the present instruction using a small high speed RAM, then the next instruction should be available by the time the present instruction has been interpreted. It is expected that early home systems will primarily execute interpretive languages and the VRAM can be used for low cost program store in this manner.

FIGURE 2. GENERAL SYSTEM DIAGRAM

PATTERN GRAPHICS DESCRIPTION

The pattern graphics mode generates 49152 pixels in 16 colors grouped in 32 columns by 24 rows of 8 pixel by 8 pixel cells. Each of the 768 cells (32x24 = 768) is mapped into by way of a 768 byte long pattern name table. Each 8 bit name is used to point at one of 256 possible 8 byte entries in the pattern generator table. (See Fig. 3) Each 8 byte entry in the generator table defines an 8 x 8 pixel description; wherever a "1" appears in the generator table entry the "one color" for that pattern will be shown, and wherever a "0" appears in the table entry the "zero color" will be shown. The one and zero colors are given by a color table list where the 5 most significant bits of the name select one of 32 entries, the 4 most significant bits of each entry gives the one color and the 4 LS bits gives the zero color. The net result is that 256 differently shaped cells can appear on the screen at one time, and each 8 by 8 pixel cell on the screen can have 2 of sixteen "colors" in it. The VDP has base address registers for the various tables so that the tables can be located at different places in memory; also, multiple tables can be stored in memory and can be switched to by varying the base address, thereby an entire screen can be changed instantaneously by writing to one VDP register.

FIGURE 3. PATTERN FORMATION

TEXT MODE

The text mode is a variation on the pattern mode. In this mode only two of the sixteen colors are available for the entire screen. There are 40 columns by 24 rows of 6 by 8 character cells. This allows 40, 5x7 ASCII characters to be shown on one line. While primarily intended for textual display, it can be used for two color graphics as well.

MULTICOLOR MODE

The multi-color mode on the VDP allows for direct memory mapping of 64 by 48 color squares (each square is 4 by 4 pixels in size). The multi-color mode uses a name table and by proper ordering of this table memory mapping of the entire screen or select areas can be achieved. This mode trades of lower resolution for color memory mapping capability. High resolution sprites are still available in this mode.

DYNAMIC OBJECT ORIENTED CHARACTER CAPABILITY - SPRITES

A Sprite is a dynamically movable character and has four attributes that describe them; the vertical position, horizontal position, the NAME and the TAG. (See Fig. 4) The two position bytes specify the X and Y position on the screen. The TAG contains the 4 bit color code for the sprite and an early clock bit. If the early clock bit is set, the horizontal position of the sprite is shifted 32 pixels to the left. (This allows the sprite to appear gradually from the left side of the screen.) The NAME of the sprite is used to point at the shape for the corresponding sprite in the sprite pattern generator table. The one's in the pattern generator corresponds to where the sprite color will appear. The 32 sets of 4 sprite attributes are put in an ordered list with the highest priority sprite (SPRITE 0) attributes first. The ordering of the list determine which sprite is shown on top of which. Sprites can have 8X8 pattern generator descriptor (SIZE = 0) or 16 X 16 pattern generator descriptor (SIZE = 1); this is called the SIZE option. With SIZE = 1, larger sprites can be shown but still retain full detail. A magnification (MAG) option allows for the simple enlarging of sprites. With MAG = 1 a 8 X 8 size sprite is blown up to 16 X 16 pixels on the screen (Note the resolution is lower than with SIZE = 0 MAG = 1), and 16 X 16 size sprite can be blown up to 32 X 32 pixels. Thus, a single SIZE = 1 MAG = 1 sprite can cover sixteen times the screen area of a SIZE = 0 MAG = 0 sprite.

There can be 32 different sprites on one screen with 4 sprites on one line. This is because the VDP truly processes the sprites algorithmically by scanning the sprites attributes and determining which will be shown on a given line, but there is only hardware available to show 4 sprites at a time. The processing allows the VDP to have up to 32 characters on one screen in an affordable manner, since it would be impractical to have 32 sets of display hardware, one set for each sprite.

FIGURE 4. SPRITE FORMATION

Sprites can do more than act as action "players"; they can also be used in a static fashion to add full color detail to the pattern and multicolor modes. Therefore, the ability to have large numbers of them can also give more color detail. Sprites can appear on the top of the pattern or multicolor display planes.

SPRITE AND PATTERN PLANES

The VDP has priority logic for determining what is shown on the screen. One way to visualize how the priority system works is to think of each priority level as a plane that is physically in front of lower priority planes. An object on one plane "hides" behind it any object on a lower plane. The transparent color code can be used to allow lower priority planes to show through. This results in the VDP giving three dimensional effects.

An example of the plane effects is given in figure 5. It shows a car driving down the road with trees on either side. The tree in front hides the car as it passes by, but the tree behind is hidden by the car, except for the window where the tree shows through. The car is made up of 4 sprites, two for the body and one for each wheel. The tree in front is put on a higher priority planes so that it may hide the car. The wheel of the car can be made to "rotate" by using different names for the wheels, with each name pointing to a different view of a turning wheel. The result gives a three dimensional visual effect yet requires very little processing on the part of a CPU, and the car can be made to move down the road with very few byte transfers.

FIGURE 5. VDP DISPLAY PLANES

BIOGRAPHY

Karl Guttag received his B.S.E.E. degree from Bradley University in 1976 and his M.S.E.E. from the University of Michigan in 1977. He started working on the TMS 9918 Video-Display Processor (VDP) shortly after leaving school and did system design, logic design, and circuit design on it. He is currently a Program Manager for Advanced Products in MOS Microprocessor Design at Texas Instruments.




Return to top
0.218s